The present invention relates to an internal voltage generating circuit which generates an internal voltage utilized inside an integrated circuit device, in particular, relates to configuration of the internal voltage generating circuit which has a temperature compensation function of the internal voltage.
The operating characteristic of a semiconductor element has temperature dependence, and a value of resistance of a resistive element also has temperature dependence. When a circuit is comprised of an active element and a passive element, such as a semiconductor element and a resistive element, temperature dependence occurs in the operating characteristic of the circuit, making it difficult to stably obtain the desired characteristic. For example, in a nonvolatile memory, information is stored by accumulating charges in a charge storage layer. The transfer rate of charges has temperature dependence, and a rise of temperature will reduce the transfer rate of charges under the influence of a lattice vibration etc. Therefore, such situation will make it difficult to move sufficient charges within a given length of time, and a data write/erasure/holding property will deteriorate.
In order to compensate such temperature dependence of the element characteristic and to obtain a stable operating characteristic in a broad temperature range, measures are taken generally to suppress a circuit property degradation by generating an internal voltage which has temperature dependence. That is, temperature compensation is made to an internal voltage, such as an internal power supply voltage, so as to impart temperature dependence to the internal voltage. In order to make such temperature compensation, temperature of a semiconductor chip in which a semiconductor integrated circuit device is formed is detected using a temperature sensor, and a voltage level or circuit operation property is changed according to the detected temperature.
An example of configuration of such a temperature detection circuit is disclosed by Patent Literature 1 (Japanese Unexamined Patent Publication No. 2007-192718), Patent Literature 2 (Japanese Unexamined Patent Publication No. 2005-16992), and Patent Literature 3 (Japanese Unexamined Patent Publication No. 2004-85384). In the configuration disclosed by Patent Literature 1, a temperature-independent voltage and a temperature-dependent voltage are generated, and then, the difference of the temperature-independent voltage and the temperature-dependent voltage is obtained and amplified, to generate a second temperature-dependent voltage. By comparing the second temperature-dependent voltage with a temperature-independent standard voltage, a signal indicative of temperature is activated, based on the comparison result (with reference to the temperature-independent voltage, the analog-to-digital conversion of the second temperature-dependent voltage is performed).
In Patent Literature 1, by reducing dependence of the temperature-dependent voltage on a power supply voltage and a manufacturing process, and by enhancing the dependence on temperature etc., stable detection of a chip temperature is promoted, without being influenced by process fluctuation and power supply potential fluctuation. In one embodiment of Patent Literature 1, a refresh interval of DRAM (dynamic random access memory) is adjusted according to the temperature detection result, such that the refresh interval is made short at high temperature and made long at low temperature.
Patent Literature 2 discloses a temperature detection device aiming at improving a temperature measurement accuracy. That is, a difference of a base-emitter voltage of a diode-coupled bipolar transistor at the time of supplying a constant current and at the time of supplying an N-fold constant current is obtained, and temperature is detected using the difference. The difference is generated by converting the constant current and the N-fold constant current into digital values.
In Patent Literature 2, in order to generate an N-fold constant current, a constant current from a constant current source is supplied to each of N transistors arranged in parallel; accordingly, improvement of the consistency of the constant current and the N-fold constant current is promoted.
Patent Literature 3 generates a standard voltage of which the level is programmable, and a current corresponding to the standard voltage is flowed through a diode element, and a voltage drop of the diode element is detected by a voltage follower to generate an analog voltage. The analog voltage is converted into a digital value by an A/D conversion circuit. In the A/D conversion circuit, a digital voltage which is adjusted by count value of a counter is compared with the analog voltage by a comparator, and the count value is stored in a register based on the comparison result. Temperature information obtained by the comparison result is stored in the register, transmitted to an external CPU, and the temperature compensation is performed.
In Patent Literature 3, since operating characteristics (transmissivity etc.) of an electro-optics element and others differ depending on an operating environment temperature, a high-precision temperature compensation is made by suppressing the influence of the manufacturing process and temperature, in order to apply voltage corresponding to the environmental temperature.    Patent Literature 1: Japanese Unexamined Patent Publication No. 2007-192718    Patent Literature 2: Japanese Unexamined Patent Publication No. 2005-16992    Patent Literature 3: Japanese Unexamined Patent Publication No. 2004-85384